EEVblog #1129 - Creating a Nice Readable Schematic: https://t.co/aGD1yAm1Y2 via @YouTube
1.) Set snap grid spacing properly.
Wires, nodes and component terminals should align with the schematic editor's grids to avoid misalignment and possible NCs.2.) Signals should flow from left to right.
Input terminals/blocks to the left, output terminals/blocks to the right. This ascertains signal flow from left to right no matter how the components are ordered.
3.) Ground symbols should be pointing downward. If the ground symbol has no space, make space by extending the wire.
This makes a schematic more pleasant to look at. Likewise, supply nets that are above ground potential should be pointing upward.4.) Lines should never be at an angle in a schematic.
It may confuse the reader to see more than 2 orientations for the wires (i.e. vertical and horizontal). Slanting wires are more susceptible to fading and to misinterpretations.5.) Never have lines going through chip symbols.
Lines that go through chip symbols (most probably via wire connection) can cause an altered printout of the symbol or an overlap with important labels. To avoid misinterpretations, no drawings should intersect with such symbols.6.) Vertical orientation is preferred, making letters and words easy to read.
There is no general rule to orientation (except in keeping coherence). But it is important to use the same orientation throughout the schematic. For example, if component designators are placed on top and component values at the bottom, they should be that way for all components in the circuit.
7.) Generally, hide the footprint of the component.
A component's footprint is clutter in the schematic. Hiding such details saves space and gives the circuit a cleaner look.8.) Net names should always be on top of the wire by convention. Signals coming out should have an extender line and should not be lying in the middle.
Placing net names on top of their assigned wires near the beginning or end of the terminal avoids confusion. If the signals through these nets go out to other portions/regions of the circuit that cannot be physically connected via drawing, these lines should be extended.9.) Don’t have stuff flapping around in the breeze.
Unless the net represents a substrate connection to ground (in circuit simulation), it is not advisable to have floating components as they consume space and are redundant to other parts of the circuit.10.) Avoid crossing wires or cross as few wires as possible.
Crossing wires increases risk of misinterpretation in the printout and contribute to the messy look of a circuit.11.) If they’re not going anywhere, don’t label them at all.
Just because we can label a wire with a net name does not mean we should. Some connections may be redundant and would simply end up as clutter to the layout.12.) Minimize lines running along the sheet.
Optimizing line paths that run on the sheet saves space and yields a tidier look for the layout.13.) Think of ways to optimize all available space.
Aside from shortening wires and dropping out unnecessary labels, a lot of other things can be done to economize free space. Some examples are editing the symbol or making a custom symbol that is smaller than the default provided by the editor, and re-arranging or re-orienting components.14.) Power on top, ground at the bottom, and place decoupling caps. nearest the pin you are de-coupling.
Power lines/nodes should always be at the top, because they have the highest potential. Grounds should be at the bottom as they have the lowest potential (ground potential - unless the circuit works with a negative supply). Decoupling capacitors are placed closest to the terminal as they are in the actual implementation.15.) Line up components.
Adding to the comprehensibility and aesthetic of the layout, aligning pull-up resistors and bypass capacitors goes a long way in helping the reader in his/her analysis of the circuit.16.) Add little notes if the function of a component or wiring isn’t obvious.
If details of a unique component are hard not to express in text on the schematic, do not use the net name or attribute label of the component. It is better to use little notes perhaps blocked on the region that serves the particular function.17.) Avoid putting decimal points (ex. 0.01uF), use 10nF.
Decimal points can also be replaced with the unit modifier. Misprints occur a lot with points/dots costing the unknowing reader his/her job in the assembly house.18.) Block up the inputs and outputs.
Interfaces to and fro the circuit can be enclosed in a box to improve comprehension.19.) Do not neglect symbol polarities.
The flat line of a polarized capacitor symbol is the positive terminal and should be connected to a potential higher than it's negative terminal.20.) Do not connect 4-way junctions at a single node, separate them to avoid errors caused by misprints.
Similar to #17, points/dots can become blurred in the printout. Having a 4-way junction with a dot can be misinterpreted by the reader.The rules of schematic layout are not constricted by these mere 20 guidelines. In fact, schematic layout may change over time with emerging technologies, necessitating an ever-changing set of rules.
Just remember the 2 principles of clarity and coherence - the main goal is to communicate the circuit to be laid out clearly, not to discombobulate the reader with the circuit's complexities.
For additional tips and further reading, I highly recommend the forums below:
https://electronics.stackexchange.com/questions/28251/rules-and-guidelines-for-drawing-good-schematics
http://www.eevblog.com/forum/blog/eevblog-1129-creating-a-nice-readable-schematic/
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